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FIB International is equipped with the latest Dual-beam system capable of quickly producing a cross section and acquiring a high resolution image. These capabilities are ideal for the manufacturing environment for both process monitoring and defect review. Using wafer navigation and other advanced automation software, FIB International can quickly drive to several specific location on a wafer, produce a cross section, acquire an image, and take and save CD measurements of critical components. These data can then be fed back into the process line to correct process errors. These techniques can also be used to locate, review and analyze defects on a wafer. Scanning Electron and Scanning Ion images can also be used to compare surface morphology and grain structures.
Scanning Electron Microscopy (SEM)SEM is used to perform submicron inspection with long depth of field. The technique allows surface inspections at the sub-micron level. Defects too small to be seen by an optical microscope are easily seen by a SEM.
EDS is used to perform material analysis. This technique, used in conjunction with the SEM, determines the composition of the materials being analyzed.
This is a standard industry service. This service can
be done at high magnifications and deep within a material to determine any
anomalies or defects. Common uses are to non-destructively determine
continuity problems within an IC package or PCB.
This technique is used to determine
delaminated layers, and voids in materials. Materials to be analyzed could
be integrated circuit (IC) packages, printed circuit boards (PCB), or any
solid substance used in the semiconductor and telecommunications industries.
The LC technique is used to determine
heat dissipated by an electrical current in a circuit on an IC. It can be
used to identify leakage, which causes more than 2 milli-Watts of power.
It is part of the process to have the circuit biased to the failing or
"leaky" state.
Emission microscopy is a technique that
compliments LC analysis. It detects the photons emitted from anomalous
currents. When some circuits leak, electrons and holes recombine and
produce photons at the leakage site. This technique is much more sensitive
and can detect a few nano-Amps of leakage current. This technique also
requires the sample under analysis to be biased in a leaky state.
Reverse engineering and construction analysis provide information on fabrication processes, packaging processes, and circuit schematics of IC devices. This analysis involves number of measurements such as die/package dimensions, metal/dielectric thickness, transistor channel lengths/widths, diffusion/transistor isolation types. Tracing the signals to determine the circuit schematics also will be performed if requested.
Perform failure analysis IC devices and printed circuit boards. The standard procedure involves performing (1) electrical tests such as curve tracing analysis and bench tests, (2) electrical failure isolations such as electrical probing, liquid crystal analysis, and emission microscopy analysis, and (3) physical failure isolation such as laser isolation, X-ray analysis, SAM analysis, deprocess, optical and SEM inspection, and Focus Ion Beam.
We now offer a complete line of defect review services. Equipped with high resolution SEM and EDS systems, FIB International can provide you with a comprehensive analysis package. An EDS system coupled with a high resolution SEM and FIB allows very quick analysis of all type of samples. The FIB can quickly prepared a site-specific cross section. The SEM and EDS can be used to quickly image and analysis the area. For even greater resolution and detail, FIB International can also provide TEM sample preparation and imaging to give the best result possible.
The increased usage of flipchip and C4 technology has made IC debug more difficult. Front side analysis techniques are no longer enough for C4 technology.
FIB International offers comprehensive backside analysis and modification services:
Flipchip packaging technology has significantly restricted access to the active device. Updated sample preparation techniques are required to resolve this issue. FIB International now offers a variety of sample preparation services dedicated to the Flipchip arena.
We can open all types of flipchip packages to allow access to the die.
The most common need on flipchip devices is to thin the backside of the silicon wafer to allow for optical imaging and FIB access. We can control the lapping and polishing process to < 5 micron tolerance in thickness and flatness. We can also give the device a mirror finish which reduces light diffraction while going through the silicon.
A common requirement for backside optical applications is to coat the silicon with AR or other materials which allows for better imaging and signal acquisition. FIB International can deposit the required material with precision and control in both thickness and purity.
